1. Field of the Invention
The present invention relates to a digital image display for converting an analog input video signal to a digital signal, performing signal processes such as pixel conversion on the digital signal, and transmitting the resultant signal to a display unit.
2. Description of the Background Art
For example, in an image display using a liquid crystal panel, a display unit as the liquid crystal panel portion requires a digitized video signal (digital video signal). Consequently, when a video signal supplied to such a digital image display is an analog signal, the analog video signal has to be A/D (analog-to-digital) converted. An example of the analog video signal which is supplied to the digital image display is a video output signal of a current personal computer or the like.
A sampling clock used at the time of the A/D conversion is generated from a vertical synchronizing signal and a horizontal synchronizing signal which are either included in the input analog video signal or extracted from the input analog video signal and separately supplied. Usually, the sampling clock is generated so that its frequency coincides with the frequency of a dot clock (clock specifying the period of a dot, used by a personal computer or the like to generate a video signal as a dot train) specifying the size of one pixel (dot) in the analog video signal.
The video signal converted to the digital signal is subjected to signal processes such as pixel conversion and picture quality adjustment before it is supplied to the display unit.
The pixel conversion denotes a process of enlarging or reducing an image, which is performed when the resolution (expressed by dotsxc3x97lines) of the input analog video signal and that of the display unit do not coincide with each other. For example, when the resolution of the input analog video signal is 640 dotsxc3x97480 lines and the resolution of the display unit is 1024 dotsxc3x97768 lines, a process of enlarging an image (pixel conversion) by 1024/640 times in the horizontal direction and by 768/480 times in the vertical direction is performed on the input analog video signal and the resultant signal is transmitted to the display unit. As a result, the image is displayed fully on the screen of the display unit of 1024 dotsxc3x97768 lines.
When the sampling clock used at the time of sampling the input analog video signal is used as it is at the time of the pixel conversion and the digital video signal is transmitted to the display unit, only data of the pixel amount of 640 dotsxc3x97480 lines can be transmitted. In order to enable the data of the pixel amount of 1024 dotsxc3x97768 lines to be transmitted to the display unit, it is necessary to newly generate a data clock of a frequency different from that of the sampling clock, which is adapted to the resolution of the display unit (that is, for specifying the resolution after the pixel converting process) and transmit the digital video signal by using the data clock to the display unit. As described above, in the digital image display, two kinds of clock signals (sampling clock and data clock) of different frequencies are used in the video signal process.
There are cases where noise occurs in the input analog video signal. When the noise has a component synchronized with the data clock, at the time of processing the digital video signal and transmitting the processed signal to the display unit, the noise component is also sampled and interference of stripes or the like, that is, what is called beat noise (regular noise) appears on the display screen. When the two kinds of clock signals of different frequencies as described above are generated in the proximity of one chip, the different clock frequencies interfere with each other and beat interference is apt to occur.
Obviously, the beat interference can be generally solved by separating an analog signal processing unit (A/D converter in the above example) from a digital signal processing unit. However, as the integration density of an IC (Integrated Circuit) increases, the analog signal processing unit and the digital signal processing unit are realized in a single IC. It is therefore difficult to separate the analog video signal processing unit from the digital video signal processing unit.
An example of an image display capable of suppressing occurrence of beat noise is disclosed in Japanese Patent Application Laid-Open No. 9-244586 (1997). FIG. 8 shows the configuration of the technique. Shown in FIG. 8 are a synchronization separating circuit 101 for separating a sync signal from a video input signal, a first phase comparator 102, a first LPF (Low Pass Filter) 103, a first VCO (Voltage Controlled Oscillator) 104, and a first counter 105. The first phase comparator 102, first LPF 103, first VCO 104, and first counter 105 construct a first PLL (Phase Locked Loop) 106.
Also shown in FIG. 8 are a pixel converting circuit 107 for enlarging or reducing an image, a second phase comparator 108, an adder 109, a second LPF 110, a second VCO 111, and a second counter 112. The second phase comparator 108, adder 109, second LPF 110, second VCO 111, and second counter 112 construct a second PLL 113.
Also shown in FIG. 8 are a timing generating circuit 114 for receiving a clock output from the second PLL 113 and generating various timings, a first frequency divider 115 for frequency-dividing a horizontal sync signal, a second frequency divider 116 for frequency-dividing a vertical sync signal, and an exclusive OR gate 117 for performing an exclusive OR operation on outputs from the first and second frequency dividers 115 and 116.
According to the technique, a composite video input signal supplied from the outside is supplied to the pixel converting circuit 107. The pixel converting circuit 107 performs the process of enlarging or reducing the video input signal by using a clock from the first PLL 106 (which is an output from the first VCO 104 and corresponds to the sampling clock) and a clock from the second PLL 113 (which is an output from the second VCO 111 and corresponds to the data clock).
By adding a voltage of a predetermined volume to the VCO control voltage of the second PLL 113 for generating a clock at the post stage every toggle cycle as the exclusive OR of the horizontal and vertical cycles, the video signal is modulated. That is, noise is added to an image in which beat interference is apt to appear, thereby making regular interference inconspicuous.
As noise is added to an image, however, the method as described above has a problem such that other adverse influences such as phase deviation (jitter) are apt to be exerted on the image.
According to a first aspect of the present invention, there is provided an image display having: an A/D converting unit for receiving an analog video signal and sampling the analog video signal by using a sampling clock, thereby converting the analog video signal into a first digital video signal; a signal processing unit for performing a pixel converting process on the first digital video signal by using a data clock for specifying resolution after the pixel converting process to thereby generate a second digital video signal; a display unit for receiving the second digital video signal and displaying an image; and a control unit for controlling generation of the sampling clock and generation of the data clock, wherein a frequency of the data clock is preset for each kind of the analog video signal, and the control unit selects the frequency of the data clock on the basis of the presetting at the time of controlling the generation of the data clock.
According to a second aspect of the invention, in the image display, the analog video signal is supplied as a dot train, and a frequency of a dot clock for specifying a period of the dot train of the analog video signal and a frequency of the data clock are set so that one of the frequencies does not become an integral multiple of the other.
According to a third aspect of the invention, in the image display, the control unit executes the selecting operation only after the analog video signal or a sync signal of the analog video signal continues to be the signal of the same image for a predetermined period.
According to a fourth aspect of the invention, the image display further has a writable storage device, and when the analog video signal or the sync signal of the analog video signal continues to be the signal of the same image for a predetermined period, the preset information based on which the control unit performs the selecting operation is stored in the storage device, and only when the image display is operated again, the control unit executes the selecting operation on the basis of the information.
According to a fifth aspect of the invention, in the image display, when the set information based on which the control unit performs the selecting operation is already stored in the storage device, the preset information is updated and stored in the storage device each time the analog video signal or the sync signal continues to be the signal of the same image for a predetermined period.
According to a sixth aspect of the invention, in the image display, when the preset information based on which the control unit performs the selecting operation is already stored in the storage device, each time the analog video signal or the sync signal continues to be the signal of the same image for a predetermined period, new information is compared with the information already stored, and when the new information is different from the information already stored, the storage device is updated to the new information.
According to a seventh aspect of the invention, the image display further has an input signal discriminating unit for receiving the sync signal of the analog video signal, discriminating the kind of the analog video signal from the sync signal, and transmitting the discrimination result to the control unit, and the control unit executes the selecting operation by using the discrimination result.
According to an eighth aspect of the invention, in the image display, the input signal discriminating unit further estimates resolution of the analog video signal from the sync signal, and discriminates the kind of the analog video signal by also using information of the resolution.
According to a ninth aspect of the invention, the image display further has a sampling clock generating unit for generating the sampling clock under control of the control unit on the basis of the discrimination result; and a data clock generating unit for generating the data clock under control of the control unit on the basis of the discrimination result.
According to a tenth aspect of the invention, the image display further includes a storage device, and information of the frequency of the data clock preset for each kind of the analog video signal is stored as a frequency correspondence list in the storage device.
According to the first aspect, the frequency of the data clock is preset for each kind of the analog video signal, and the control unit selects the frequency of the data clock on the basis of the presetting at the time of controlling the generation of the data clock. Consequently, by presetting the data clock frequency at which beat noise is not easily caused for each kind of the analog video signal, the image display in which the occurrence of beat noise can be suppressed without adding noise to an image is achieved.
According to the second aspect, the frequency of the dot clock and the frequency of the data clock are set so that one of the frequencies does not become an integral multiple of the other, so that the occurrence of beat noise is more suppressed.
According to the third aspect, since the control unit executes the selecting operation only after the analog video signal or a sync signal of the analog video signal continues to be the signal of the same image for a predetermined period, in the case where the input signal is switched in extremely short time like at the time of start of a personal computer, the display screen can be prevented from being disturbed or remaining black to hide a disturbed screen.
According to the fourth aspect, when the analog video signal or the sync signal of the analog video signal continues to be the signal of the same image for a predetermined period, the preset information based on which the control unit performs the selecting operation is stored in the storage device, and only when the image display is operated again, the control unit executes the selecting operation on the basis of the information. Consequently, even when the user of the image display performs the process of switching the frequency of the data clock, the disturbed display screen is not shown to the user at that time point. It does not therefore make the user feel offensive or misconstrue the disturbed display screen as a failure in the image display.
According to the fifth aspect, when the set information based on which the control unit performs the selecting operation is already stored in the storage device, the preset information is updated and stored in the storage device each time the analog video signal or the sync signal continues to be the signal of the same image for a predetermined period. When the user of the image display newly switches the kind of the analog video signal, the latest frequency of the data clock can be set.
According to the sixth aspect, when the preset information based on which the control unit performs the selecting operation is already stored in the storage device, each time the analog video signal or the sync signal continues to be the signal of the same image for a predetermined period, new information is compared with the information already stored, and when the new information is different from the information already stored, the storage device is updated to the new information. Therefore, when the user of the image display switches the kind of the analog video signal, the latest frequency of the data clock can be set.
According to the seventh aspect, the input signal discriminating unit discriminates the kind of the analog video signal from the sync signal, and the control unit executes the selecting operation by using the discrimination result. Thus, the frequency according to the kind of the analog video signal can be accurately selected.
According to the eighth aspect, the input signal discriminating unit further estimates resolution of the analog video signal from the sync signal, and discriminates the kind of the analog video signal by also using information of the resolution. Thus, the frequency according to the kind of the analog video signal can be accurately selected.
According to the ninth aspect, the information of the frequency of the data clock preset for each kind of the analog video signal is stored as a frequency correspondence list in the storage device. By referring to the frequency correspondence list, the control unit can accurately select the frequency according to the kind of the analog video signal.
According to the tenth aspect, the frequency can be arbitrarily set irrespective of the preset frequency of the data clock for each kind of the analog video signal. Consequently, the user of the image display can set the frequency of the data clock in an optimum state while checking the image and the state of the beat noise.
The object of the invention is to provide an image display in which occurrence of beat noise can be suppressed without adding noise to an image.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.